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Improved Method for Multirate FIR Filter
Author(s): 
Pages: 78-80,92
Year: Issue:  23
Journal: Video Engineering

Keyword:  FIR filtertime division multiplexingmultiplication;
Abstract: 多速率FIR滤波器是数字下变频的核心技术之一.由于高阶FIR数字滤波器使用了大量的乘法单元,在FPGA中将占用大量的逻辑资源(LE),极大地限制了FPGA的设计.根据多倍抽取FIR滤波器的特性,提出了一种分时复用乘法单元以减少逻辑资源使用量的改进算法,大量节约了FPGA的逻辑资源.通过FPGA设计实现,在Quartus Ⅱ综合仿真结果中验证,设计基本达到预期效果,在满足设计要求的前提下,实现了节约逻辑资源的目的.
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