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Design and Implementation of FPGA Based Digital Delayer
Author(s): 
Pages: 73-77
Year: Issue:  23
Journal: Video Engineering

Keyword:  delayerping-pong operation mode;
Abstract: 延迟器在广播电视等领域用途十分广泛,利用FPGA芯片EP2C70F672C8设计并实现一种数字延迟器,模拟信号经AD转换后,通过乒乓读写操作送入2片SRAM芯片进行存储,然后送DA转换器恢复出延迟后的模拟信号,调节SRAM的存储深度,可以对模拟信号实现不同的延迟时间.实际测试表明,该延迟器延迟步进精度可达20ns,最大延迟时间可达5.2ms.
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