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Design of Universal LDPC Encoder in FPGA Based on DVB-S2
Author(s): 
Pages: 1-3,7
Year: Issue:  1
Journal: Video Engineering

Keyword:  DVB-S2现场可编程门阵列通用编码器低密度奇偶校验码;
Abstract: 针对DVB-S2标准中的LDPC码编码器,提出了一种基于FPGA的通用LDPC编码器设计,该编码器具有多码率通用的特点,并且利用IPCORE构造出多个ROM和RAM,实现了在同一信息位输入时所有与之关联校验位的并行处理,提高了编码速度.经试验测试表明,编码器能够稳定工作,处理速率约为63.371 Mbit/s,满足DVB-S2中不同码率下LDPC编码器的需求.
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