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Study on Design of LDPC Encoder and Decoder for DVB-S2
Author(s): 
Pages: 1-3,10
Year: Issue:  3
Journal: Video Engineering

Abstract: 研究了DVB-S2标准LDPC码编译码器的硬件结构,以16 200码长和0.6码率为例设计了基于共享内存和后验概率累加储存的译码器结构,不仅吞吐量大,而且寄存器和内存资源的消耗小.仿真分析了同码长不同码率和同码率不同码长的性能,当码长相等时,码率越低,则误码率、误帧率和平均迭代次数一般均越低.同码率不同码长的码组,虽然校验位和信息位的比例相等,但是码长越大,校验位和信息位的约束更强,性能越好.
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